ON Semiconductor Recruitment 2022 | Freshers | Intern – DFT | ME/ M.Tech – Electrical/ Electronics Engineering | Bangalore
Company: ON Semiconductor
ON Semiconductor Recruitment 2022:- ON Semiconductor is driving energy efficient innovations, empowering customers to reduce global energy use. The company is a leading supplier of semiconductor-based solutions, offering a comprehensive portfolio of energy efficient power management, analog, sensors, logic, timing, connectivity, discrete, SoC and custom devices. The company’s products help engineers solve their unique design challenges in automotive, communications, computing, consumer, industrial, medical, aerospace and defense applications.
ON Semiconductor operates a responsive, reliable, world-class supply chain and quality program, a robust compliance and ethics program, and a network of manufacturing facilities, sales offices and design centers in key markets throughout North America, Europe and the Asia Pacific regions.
Company Website: www.onsemi.com
Positions: Intern – DFT
Experience: Freshers
Salary: Best In Industry
Job Location: Bangalore
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Eligibility Criteria:
- M.Tech/MS in ECE/EEE domains.
- Good understanding in Verilog HDL.
- Good understanding of VLSI/Digital Integrated Circuits.
- Familiarity with Unix/Linux.
Job Description:
Here at ONSEMI we take great pride in our internship program and the efforts we take to provide college students and/or VLSI enthusiasts with hands-on industry experience. We provide competitive pay, medical benefits, various networking event opportunities, and flexible hours of working.
We are seeking a highly motivated individual to join the Consumer Solution Division of the Image Sensor Group, based in Bengaluru, India. As a Design for Test (DFT) intern, you will get the opportunity to learn the Design for Test (DFT) methodologies and flows used in the development of the ONSEMI’s cutting edge image sensor products. You will be able to work on all aspects of the RTL level MBIST insertion-to-post silicon bring up flow including chip sign-off activities.
Job Responsibilities:
- Implement a chip-level design from RTL level MBIST insertion to post silicon bring up.
Preferred Qualification:
- Prior knowledge on DFT topics will be a plus.
- Good Scripting Perl/TCL background.